| Authors: | T. Reep, K. De Bruyn, C. Wu, J. Jans, J. Van Kerrebrouck, Y. Huang, Y. Guo, D. Yudistira, S. Brems, I. Asselberghs, J. Van Campenhout, B. Kuyken, P. Ossieur, J. Bauwelinck, D. Van Thourhout | | Title: | A 25-GBd co-integration demonstration of Wafer-Scale Graphene Modulator and BiCMOS Driver | | Format: | International Journal | | Publication date: | Accepted for publication. Not yet published | | Journal/Conference/Book: | 2D Materials
| | Editor/Publisher: | IOP science, | | Citations: | Look up on Google Scholar
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Abstract
We demonstrate the first co-integration of a wafer-scale single-layer graphene EAM with a high-speed SiGe BiCMOS EIC, achieving robust operation up to 25 GBd. The scalable graphene EAM, fabricated in a 300-mm CMOS pilot line, exhibits an intrinsic electro-optic bandwidth of 11.2 GHz. To overcome the RC-limitation and simultaneously enable low-voltage operation, the EIC was co-designed with a 30 Ω internal termination impedance and amplifies the voltage swing by a factor of 3. This optimization increased the effective electro-optic bandwidth and allowed the co-integrated system to produce open eye diagrams at 25 GBd from a low 500 mVpp input drive voltage. We report measured Q-factors and an estimated BER of 1.37 x 10-7 at 25 GBd using a 5-tap feed-forward equalizer. This work demonstrates the first functional electro-optical link co-integrating a graphene modulator with a BiCMOS electronic driver. By validating this wire-bonded interface, we establish a feasible and practical route towards energy-efficient, scalable photonic interconnects. Related Research Topics
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